We began to develop Cell immediately after the launch of PlayStation 2 in May 2000. Obviously Cell was positioned as the processor for a next-generation computer entertainment system to succeed PlayStation 2, but we started the development project with a much more ambitious concept. We wanted to create a client processor capable of functioning as the nucleus for software interactions between networks and future computers connected to those networks. We also wanted that processor to be capable of functioning as a server. I was involved in most aspects of Cell's development, including not only the establishment of the basic concept, but semiconductor design as well.
When I first heard about the Cell concept, I felt a pure chill of excitement. I joined Sony Computer Entertainment after its establishment, and I've been involved in the development of processors for all three generations of platforms-PlayStation, PlayStation 2 and PLAYSTATION 3. However, the first encounter with a totally new challenge is always an exciting moment for an engineer. I was absolutely thrilled to have this opportunity to work on the development of this dream processor.
Because the concept of networked computing was at the heart of the Cell development project, we began by defining a design philosophy. Rather than starting with the development of hardware IC packaging, we decided to create a Java virtual machine that could be executed directly. We also decided to incorporate an agent-oriented approach into the hardware, in the form of software that would be able to work with peripheral elements while also operating independently. From the outset, we decided that Cell should be a multicore chip with multiple processor cores. Multiprocessor systems with multiple CPUs were already on the market. We debated until the last possible moment about whether Cell should be a homogenous multicore system with multiple cores based on the same specifications, or a heterogeneous multicore system containing multiple cores with different specifications. The use of multiple processors based on the same specification would increase the complexity of some elements, including the cache system and memory management. This approach would also result in higher costs, since it would be necessary to incorporate these elements for each processor. In contrast, an architecture with multiple processors operating separately under a single processor dedicated to memory management would simplify memory management and provide robust security. This approach would also result in a simpler structure for the multiple processors and allow a smaller package area, thereby helping to reduce costs. After considering these advantages, we ultimately decided on a heterogeneous multicore specification consisting of one PowerPC Processor Element (PPE) and eight Synergistic Processor Elements (SPE).
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